Design and optimization of high voltage (HV) drain extended FinFET transistors for analog SoC applications
Material type: BookPublication details: Gandhinagar : Indian Institute of Technology Gandhinagar, 2020Description: ix, 60p. : ill. ; 30 cmSubject(s): DDC classification:- 621.3 PAL
Item type | Current library | Call number | Status | Date due | Barcode |
---|---|---|---|---|---|
Theses | IIT Gandhinagar | 621.3 PAL (Browse shelf(Opens below)) | Available | T00660 |
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