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Logical effort: designing fast CMOS circuits

By: Contributor(s): Material type: BookBookPublication details: San Francisco: Morgan Kaufmann Publishers, 1999.Description: xv, 239p.: ill; 24 cmISBN:
  • 9781558605572
Subject(s): DDC classification:
  • 621.38152 SUT
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Item type Current library Collection Call number Status Date due Barcode
Books Books IIT Gandhinagar General 621.38152 SUT (Browse shelf(Opens below)) Available 016896
Books Books IIT Gandhinagar General 621.38152 SUT (Browse shelf(Opens below)) Available 016897
Books Books IIT Gandhinagar 621.38152 SUT (Browse shelf(Opens below)) Available 008138

Includes bibliographical references and index

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