Investigating the analog performace of FinFETs in sub-10nm Wfin regime by analyzing the drain saturation voltage (VDS,SAT )

By: Contributor(s): Material type: TextPublication details: Gandhinagar : Indian Institute of Technology Gandhinagar, 2020.Description: vii, 51p. : ill. ; 30 cmSubject(s): DDC classification:
  • 621.3746 JAI
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Theses (M.Tech) IIT Gandhinagar 621.3746 JAI (Browse shelf(Opens below)) Available T00646

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