Massive MIMO detection algorithm and VLSI architecture

By:

Liu, Leibo

Contributor(s):

Publication details: Springer, 2020. Singapore:Description: xvi, 336 p. : ill. ; pb, 24 cmISBN:

9789811363641

Subject(s):

DDC classification:

621.384 LIU

Summary: This book introduces readers to a reconfigurable chip architecture for future wireless communication systems, such as 5G and beyond. The proposed architecture perfectly meets the demands for future mobile communication solutions to support different standards, algorithms, and antenna sizes, and to accommodate the evolution of standards and algorithms. It employs massive MIMO detection algorithms, which combine the advantages of low complexity and high parallelism, and can fully meet the requirements for detection accuracy. Further, the architecture is implemented using ASIC, which offers high energy efficiency, high area efficiency and low detection error. After introducing massive MIMO detection algorithms and circuit architectures, the book describes the ASIC implementation for verifying the massive MIMO detection. In turn, it provides detailed information on the proposed reconfigurable architecture: the data path and configuration path for massive MIMO detection algorithms, including the processing unit, interconnections, storage mechanism, configuration information format, and configuration method.

Tags from this library: No tags from this library for this title. Log in to add tags.

Average rating: 0.0 (0 votes)

Holdings
Item type	Current library	Collection	Call number	Copy number	Status	Date due	Barcode
Books	IIT Gandhinagar General Stacks	General	621.384 LIU (Browse shelf(Opens below))	1	Available		030040

Browsing IIT Gandhinagar shelves, Shelving location: General Stacks, Collection: General Close shelf browser (Hides shelf browser)

Previous								Next
Previous	621.3828 BEN Perspective on stereophonic acoustic echo cancellation	621.3828 BEN Noise reduction in speech processing	621.384 CHO MIMO-OFDM wireless communications with MATLAB	621.384 LIU Massive MIMO detection algorithm and VLSI architecture	621.384 MAN 5G and beyond wireless systems: PHY Layer Perspective	621.384 RAP Millimeter : wave wireless communications	621.384 TSE Fundamentals of wireless communication	Next

Includes bibliographical references.

This book introduces readers to a reconfigurable chip architecture for future wireless communication systems, such as 5G and beyond. The proposed architecture perfectly meets the demands for future mobile communication solutions to support different standards, algorithms, and antenna sizes, and to accommodate the evolution of standards and algorithms. It employs massive MIMO detection algorithms, which combine the advantages of low complexity and high parallelism, and can fully meet the requirements for detection accuracy. Further, the architecture is implemented using ASIC, which offers high energy efficiency, high area efficiency and low detection error. After introducing massive MIMO detection algorithms and circuit architectures, the book describes the ASIC implementation for verifying the massive MIMO detection. In turn, it provides detailed information on the proposed reconfigurable architecture: the data path and configuration path for massive MIMO detection algorithms, including the processing unit, interconnections, storage mechanism, configuration information format, and configuration method.

There are no comments on this title.

to post a comment.