Proceedings of 5th international conference on product lifecycle modeling simulation and synthesis
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- 621.392 RAO
Item type | Current library | Call number | Status | Date due | Barcode |
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IIT Gandhinagar | 621.392 RAO (Browse shelf(Opens below)) | Available | 023778 |
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621.392 PAL Verilog HDL : | 621.392 PAL Verilog HDL : | 621.392 PAL Verilog HDL : a guide to digital design and synthesis | 621.392 RAO Proceedings of 5th international conference on product lifecycle modeling simulation and synthesis | 621.392 ROT Principles of digital systems design using VHDL | 621.392 ROT Principles of digital systems design using VHDL | 621.392 ROT Principles of digital systems design using VHDL |
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