Chip design for submicron VLSI: CMOS layout and simulation
Material type:![Book](/opac-tmpl/lib/famfamfam/BK.png)
- 9788131501955
- 621.3815 UYE
Item type | Current library | Collection | Call number | Status | Date due | Barcode |
---|---|---|---|---|---|---|
![]() |
IIT Gandhinagar | General | 621.3815 UYE (Browse shelf(Opens below)) | Available | 002269 | |
![]() |
IIT Gandhinagar | Reference | 621.3815 UYE (Browse shelf(Opens below)) | Available | C00130 | |
![]() |
IIT Gandhinagar | General | 621.3815 UYE (Browse shelf(Opens below)) | Available | 008181 | |
![]() |
IIT Gandhinagar | Reference | 621.3815 UYE (Browse shelf(Opens below)) | Available | C00478 |
Browsing IIT Gandhinagar shelves, Collection: Reference Close shelf browser (Hides shelf browser)
Includes bibliographical references and index.
There are no comments on this title.