Chip design for submicron VLSI: CMOS layout and simulation
Material type: BookPublication details: New Delhi: Cengage Learning, 2006.Edition: India EditionDescription: xvi, 411 p: ill; 25cmISBN:- 9788131501955
- 621.3815 UYE
Item type | Current library | Collection | Call number | Status | Date due | Barcode |
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Books | IIT Gandhinagar | General | 621.3815 UYE (Browse shelf(Opens below)) | Available | 002269 | |
CD/DVD | IIT Gandhinagar | Reference | 621.3815 UYE (Browse shelf(Opens below)) | Available | C00130 | |
Books | IIT Gandhinagar | General | 621.3815 UYE (Browse shelf(Opens below)) | Available | 008181 | |
CD/DVD | IIT Gandhinagar | Reference | 621.3815 UYE (Browse shelf(Opens below)) | Available | C00478 |
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621.3815 SED Microelectronic circuits: theory and applications | 621.3815 STE Analog and mixed-signal electronics | 621.3815 TOC Lab manual: a design approach, to accompany digital systems; principles and applications, 11th ed. | 621.3815 UYE Chip design for submicron VLSI: CMOS layout and simulation | 621.3815 VAI On-Chip power delivery and management | 621.3815 WAN CMOS IC design for wireless medical and health care | 621.3815 ZBA Basic electronics : |
Includes bibliographical references and index.
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