MARC details
| 000 -LEADER |
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| fixed length control field |
01309 a2200217 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
191015b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
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| International Standard Book Number |
9781118760512 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
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| Classification number |
621.39732 PRI |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
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| Personal name |
Prince, Betty |
| 245 ## - TITLE STATEMENT |
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| Title |
Vertical 3D memory technologies |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
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| Name of publisher, distributor, etc |
John Wiley & Sons Ltd. |
| Date of publication, distribution, etc |
2014 |
| Place of publication, distribution, etc |
Chichester: |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xiii; 351p. |
| Other physical details |
hb; |
| Dimensions |
25 cm |
| 365 ## - TRADE PRICE |
|---|
| Price type code |
USD |
| Price amount |
139.25 |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc |
The large scale integration and planar scaling of individual system chips is reaching an expensive limit. If individual chips now, and later terrabyte memory blocks, memory macros, and processing cores, can be tightly linked in optimally designed and processed small footprint vertical stacks, then performance can be increased, power reduced and cost contained. This book reviews for the electronics industry engineer, professional and student the critical areas of development for 3D vertical memory chips including: gate-all-around and junction-less nanowire memories, stacked thin film and dou.<br/><br/> |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Strains and Stresses -- Simulation Methods. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
TECHNOLOGY & ENGINEERING -- Mechanical. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Three-Dimensional Integrated Circuits. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Semiconductor Storage Devices. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Three-Dimensional Integrated Circuits -- Design. |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Dewey Decimal Classification |
| Item type |
Books |
